Portable communication devices such as cellular-type telephones or other communication devices are becoming more widespread. A portable communication device includes one or more power amplifiers for amplifying the power of the signal to be transmitted from the portable communication device.
With the decreasing size of portable communication devices, power efficiency is one of the most important design criteria. Reducing power consumption prolongs power source life and extends stand-by and talk time of the portable communication device.
A portable communication device may employ a constant or a non-constant envelope modulation methodology. A non-constant envelope modulation scheme is typically implemented with a linear power amplifier. The entire amplitude and phase modulated waveform is provided to the input of the power amplifier and the power amplifier amplifies the combined signal. In a non-constant envelope modulation scheme, “power control” can be implemented as a “slow loop” regulating the gain of the power amplifier or adjusting the input amplitude to compensate for gain variation in the power amplifier that occurs due to process and temperature variations. Unfortunately, a linear power amplifier is significantly less efficient than a nonlinear power amplifier and, as such, consumes more power.
In the case where both a constant envelope modulation methodology and a non-constant envelope modulation methodology are employed, such as in a communication device that operates using the Global System for Mobile Communication (GSM) and the Enhanced Data Rates for GSM Evolution (EDGE) communication formats, the same power amplifier should be used for both signals. The GSM system provides a slightly higher output power and uses a constant-envelope modulation methodology. The EDGE system uses a non-constant-envelope modulation methodology. If a linear power amplifier is used to implement EDGE, then the power amplifier is less efficient when operated in GSM mode. This is why it is desirable to find a way to make a non-linear power amplifier work in EDGE mode.
Polar modulation is a known technique of performing non-constant envelope modulation using a nonlinear power amplifier. In polar modulation, a phase modulated input signal is applied to the radio frequency (RF) input to the power amplifier. The output power of the power amplifier is adjusted at the rate of the amplitude modulation to recompose the modulated waveform at the output of the power amplifier.
A GSM system has traditionally been implemented using a nonlinear power amplifier, with the “power control” implemented as a (slow) gain modulation in the power amplifier. A “power control” signal is supplied to the power amplifier from the baseband subsystem to implement the time-slotting (ramp up power at the beginning of the time slot, ramp it down at the end) of the communication protocol using this slow gain modulation. One prior attempt at implementing a power amplifier in the EDGE system using polar modulation increases the performance of the “power control” signal, so that the power amplifier output power can be changed rapidly to create the modulation and to create the power control (i.e. there is still the slow ramp up and ramp down at the edges of the slot, but the faster modulation is also added in the middle). In this manner, the power amplifier can still be used in GSM mode by applying a signal to the “power control” port with only the ramping signals, while also performing polar modulation in EDGE mode.
There are two kinds of polar modulation: open-loop and closed-loop. In open loop, there is no feedback path for the power amplifier output. In closed-loop, feedback on the amplitude and phase paths is used to measure the output amplitude and phase. The measured amplitude and phase are compared to a desired signal, and then an amplitude and gain correcting mechanism is used to minimize any discrepancy. Such an implementation is difficult while maintaining a very wide bandwidth, meeting noise requirements and preventing the system from becoming unstable and oscillating under output mismatch, for example, in the presence of a voltage standing wave ratio (VSWR).
In such a system, the phase modulation is typically applied directly to the signal input of the power amplifier. The phase can be controlled using a phase correction feedback loop. One of the challenges when implementing a so called “closed-loop polar modulation” technique is that changes in the phase of the output RE signal relative to the phase of the desired RF signal must be measured with high accuracy so that corrections to the output phase can be made.
To control the phase of the transmit signal, a phase detector in a phase correction feedback loop can be used to determine the phase of the output signal relative to the phase of the input signal, also referred to as a reference signal. The output of the phase detector is used as an error signal to control a phase shifter, which alters the phase of the transmit signal based on the difference between the phase of the output signal and the phase of the input signal. Phase detectors can also be used in applications such as phase locked loops (PLLs), phase demodulation, and in phase correction feedback loops.
FIG. 1 is a schematic diagram of a phase correction feedback loop for correcting amplifier phase distortion. Phase correction feedback loop 100 can be used to correct phase distortion caused by an amplifier 102. The phase correction feedback loop 100 comprises a phase detector 101, a phase shifter 103, a feedback network 104, and a low pass filter 106.
The amplifier 102 receives an input signal on connection 110 to produce an output. One common shortcoming with amplifiers is that they can produce phase distortion between the input signal on connection 110 and the output signal. One possible cause of this distortion can be due to amplitude modulation of the input signal 110 combined with AM/PM distortion in the amplifier 102. Another possible cause is if the amplifier 102 is configured to be a variable gain amplifier, such as if the amplifier 102 is used in polar modulation, where the phase relationship between the input signal on connection 110 and the output signal varies with the gain of the amplifier 102.
The phase correction feedback loop 100 can be used to reduce this phase distortion. The phase shifter 103 is placed between the RE input on connection 112 and the input of the amplifier 102 on connection 110. The output of the amplifier 102 is coupled through the feedback network 104 to an input of the phase detector 101. An RF reference signal is provided on connection 107 to the phase detector 101. In this example, the RF reference signal is the RF input signal. The phase detector 101 can be used to produce a detected signal on connection 109 related to the phase difference between the output of the amplifier 102 and the RF reference signal on connection 107. The detected signal on connection 109 can be filtered by the low pass filter 106 and provided as a control voltage to the phase shifter 103. The phase correction feedback loop 100 can control the phase shift between the input to the phase correction feedback loop 100 on connection 112 and the input to the amplifier 102 on connection 110 to keep the phase of the RF reference signal on connection 107 and the input to the phase detector 101 on connection 108 nearly constant. Since the phase of input signal to the phase detector 101 on connection 108 and the phase of the output of the amplifier 102 can be the same, or have a constant offset between them, the phase correction feedback loop 100 can be used to keep a constant phase relationship between the input to the phase correction loop on connection 112 and the output of the amplifier 102.
FIG. 2 is a schematic diagram of a prior art phase detector that can be used in the phase correction feedback loop of FIG. 1. The phase detector 200 comprises exclusive or gate 201, dc offset cancellation circuit 202, and an averaging filter 203. The exclusive or gate 201 receives the RF input signal and the RF reference signal as inputs and provides as an output the logical exclusive or of the two input signals. The output signal can be time-varying, and can have an average value related to the difference in phase between the input signal and the reference signal. This average value can have a value between zero and the supply voltage, Vdd, of the amplifier, such that when the input and reference signals have a phase relationship of 90 degrees between them, the output of the exclusive or gate 201 can be nearly Vdd/2. The dc offset cancellation circuit 202 can be used to remove any dc offset associated with the supply voltage, Vdd/2, so that the output of the dc offset cancellation circuit 202 can be zero when the phases of the input signals have a phase relationship of 90 degrees between them. The averaging filter 203 can remove the RF content of the detected signal while transmitting the average value of the detected signal to the output. Other phase detectors are known in the art, such as using other types of logic gates, using digital systems including flip-flops, and using mixers.
FIG. 3 is a graphical diagram illustrating the relationship between the phase of the RF input signal and the phase of the RF output signal of the phase detector 200 of FIG. 2. The waveform 301 shows the output of the phase detector 200 versus the difference between the phases of the RF input signal and the RF reference signal. As the phase of the RE input signal changes with respect to the phase of the RF reference, the output of the phase detector 200 can change, giving an indication of this phase difference. When used as the phase detector 101 in the phase correction feedback loop 100, the phase correction feedback loop 100 can reach a stable closed loop condition when the output 301 of the phase detector 200 has value of zero and negative slope. After settling, the phase correction feedback loop 100 can reach this stable point 302 and maintain the phase correction feedback loop 100 at that phase difference between input and reference phases.
FIG. 4 is a graphical diagram illustrating the output phase of the amplifier 102 as the phase correction feedback loop 100 is enabled. The waveform 401 represents the output phase of the amplifier 102 versus time. At time 403, the phase correction feedback loop 100 is enabled, causing the loop to begin to correct the phase to the stable point of the system indicated by the dashed line 402. As a result, the phase correction feedback loop 100 can require the phase shifter 103 to change its response over a phase range 404, which is the difference between the open-loop phase before the phase correction loop is enabled and the stable point 402.
The phase change indicated by the phase range 404 can be detrimental to the system if the amount of the change 404 is high. Since this change is produced by the phase shifter 103, the phase shifter 103 may be required to produce a wide range of phase shift. For example, if the open-loop output phase is 180 degrees from the stable point, the phase shifter can be required to provide −180 degrees of phase shift for compensation. This requirement for large phase shifts can put excessive burden on the design of the phase shifter, since simple phase shifters may only be capable of shifting the phase less than 90 degrees.
Another potential issue with the potentially large phase change over the phase range 404 can be a degradation in the power amplifier output spectrum during the time when the phase correction feedback loop 100 is settling. The relatively fast phase change that the loop may create can result in spreading of the rf spectrum. The amount of spectral spreading can be related to the amount of the phase change, such that smaller phase changes result in smaller degradation of the output spectrum.
In many applications it can be difficult to constrain the open loop phase to be very close to the stable point, such as if the amplifier can be presented with load mismatch. Therefore, it is desirable to have a phase detector which can enable the operation of a phase correction feedback loop while reducing the amount of the phase change that must be initially compensated when the phase correction feedback loop is first enabled.